The reduction in memory cell and other circuit size in high density dynamic random access memories (DRAMs) and other circuitry is a continuing goal in semiconductor fabrication. Implementing electric circuits involves connecting isolated devices through specific electric paths. When fabricating silicon and other semiconductive materials into integrated circuits, conductive devices built into semiconductive substrates typically need to be isolated from one another. Such isolation typically occurs in the form of either trench and refill field isolation regions or LOCOS grown field oxide.
Conductive lines, for example transistor gate lines, are formed over bulk semiconductor substrates. Some lines run globally over large areas of the semiconductor substrate. Others are much shorter and associated with very small portions of the integrated circuitry. Traditional local interconnects are formed using processing which includes chemical mechanical polishing of tungsten or other metals, and silicide processing. This invention was principally motivated in making processing improvements in the fabrication of local interconnects, and particularly in the fabrication of SRAM circuitry local interconnects and embedded technologies, although the invention is not so limited.